VLSI-SoC 2026

34th IFIP/IEEE International Conference
on Very Large Scale Integration SoC
Limassol (Cyprus), 11-14 October, St. Raphael Resort.

ORGANIZING COMMITTEE


GENERAL CHAIRS

Tiziana Margaria (University of Limerick, Ireland)
Ian O'Connor (Ecole Centrale de Lyon, France)


PROGRAM CHAIRS

Florenc Demrozi (University of Stavanger, Norway)
Panagiota Nikolaou (University of Central Lancashire, Cyprus)


PUBLICATION CHAIRS

Enrico Fraccaroli (University of Verona, Italy)
Christiana Ioannou (University of Central Lancashire, Cyprus)


SPECIAL SESSION CHAIRS

Maria Michael (University of Cyprus, Cyprus)
Theocharis Theocharides (University of Cyprus, Cyprus)


TUTORIAL CHAIRS

Alberto Bosio (École Centrale de Lyon, France)
Rafaella Elia (University of Cyprus, Cyprus)


PhD & Student Forum CHAIRS

Nahla El-Araby (TU Wein, Austria)
Fatih Ugurdag (Ozyegin University, Turkey)


AWARD CHAIRS

Katell Morin-Allory (TIMA Laboratory, France)
George Papadimitriou (University of Patras, Greece)
Mohammad Reza Heidari Iman (Université Grenoble Alpes, France)


INDUSTRIAL CHAIRS

Andreas Diavastos (Cyprus University of Technology, Cyprus)
Leticia B. Pöhls (Leibniz IHP Microelectronics, Germany)


PANEL CHAIRS

Sara Vinco (Politecnico di Torino, Italy)


PUBLICITY CHAIRS

Nicolo' Bellarmino (Politecnico di Torino, Italy)


FINANCE CHAIR

Anna Philippou (University of Cyprus, Cyprus)


LOCAL AND REGISTRATION CHAIRS

Nicolas Stratis (EasyConferences, Cyprus)
Petros Stratis (EasyConferences, Cyprus)


WEB CHAIR

Matteo Iervasi (University of Stavanger, Norway)


PROGRAM COMMITTEE



Track 1: Applications and Architectures for AI and ML
  • Elena-Ioana Vatajelu, TIMA Laboratory, Grenoble INP-UGA, France (Track Chair)
  • Chi Ying Tsui, Hong Kong University of Science and Technology (HKUST), Hong Kong (Track Chair)
  • Yanan Sun, Shanghai JiaoTong University
  • Chang Meng, Eindhoven University of Technology
  • Liang Zhao, Zhejiang University
  • Xizi Chen, Huazhong Agricultural University, College of Informatics
  • Gildas Leger, Instituto de Microelectronica de Sevilla (IMSE-CNM-CSIC)
  • Chaojian Li, Hong Kong University of Science and Technology
  • Enrico Martini, University of Verona
  • Mahmoud Rasras, New York University Abu Dhabi
  • Qinru Qiu, Syracuse University
  • Luc Claesen, University Hasselt

This topic deals with advances in the field, focusing on algorithms for developing machine learning models, AI-inspired computation models, approximate computing, and security and privacy issues related to AI and ML applications. It also covers design automation at the intersection of ML/AI algorithms and hardware. Key areas include hardware-efficient architectures for deep learning inference and training, power and hardware-efficient computation methods, low bit-width implementations for activations and weights, dynamic evaluation of neural network models, and efficient methods for few- and one-shot learning algorithms.

  • Application of AI and ML
  • Architectures for AI and ML


Track 2: Communication Architectures and Technologies
  • Dimitrios Soudris, National Technical University of Athens (NTUA), Athens, Greece (Track Chair)
  • Jawad Haj-Yahya, Meta, Switzerland (Track Chair)
  • Vassilis Paliouras, University of Patras
  • Francesco Regazzoni, University of Amsterdam and Università della Svizzera italiana
  • Vojtech Mrazek, Brno University of Technology
  • João Cardoso, University of Porto
  • Kostas Siozios, Aristotle University of Thessaloniki
  • Vigneshwar Murali, Nvidia
  • Dionysios Reisis, National Kapodistrian University of Athens, Dpt. Physics, Electronics Lab.
  • Carlos Silva-Cardenas, PUCP
  • Diana Goehringer, TU Dresden
  • Ioannis Savidis, Drexel Univesity

This topic deals with advancing communication architectures and technologies, with a special emphasis on 5G/6G networks. It includes innovative solutions in radio frequency (RF) technologies to enhance wireless communication systems, the design and optimization of network-on-chip (NoC) architectures, and ensuring efficient data transfer within complex systems. It also covers next-generation communication by integrating cutting-edge RF technologies into future networks.

  • 5G/6G technologies
  • RF
  • Network on Chip


Track 3: Computing Paradigms
  • Jürgen Becker, Karlsruhe Institute of Technology - KIT (Track Chair)
  • George Papadimitriou, University of Patras, Greece (Track Chair)
  • Dimitris Agiakatsikas, University of Piraeus
  • Helen-Maria Dounavi, University of Ioannina
  • Marcello Traiola, Inria Rennes / IRISA
  • Konstantinos Georgopoulos, Technical University of Crete
  • Mihalis Psarakis, University of Piraeus
  • Georgios Zervakis, National Technical University of Athens
  • Holger Blume, IMS, Leibniz Universitaet Hannover
  • Henk Corporaal, Eindhoven University of Technology
  • Tanja Harbaum, ITIV, Karlsruhe Institute of Technology

This topic deals with systems and accelerators based on novel computing paradigms, including associated modeling, validation, emulation, programming, integration, design, and exploration techniques. It covers emerging models of computation such as approximate computing, in- and near-memory computing, machine learning, reversible computing, evolutionary computing, and quantum computing, with a focus on architectures, encryption, error correction, and cryogenic computing.

  • Quantum computing
  • Approximate computing
  • Evolutionary computing
  • In-memory computing


Track 4: Digital Circuits Design and Synthesis
  • Victor Grimblatt, Synopsys Chile Innovation Center, Cile (Track Chair)
  • H. Fatih Ugurdag, Ozyegin University, Turkey (Track Chair)
  • Muhammad Awais, Paderborn University
  • Elif Bilge Kavun, Barkhausen Institut & TU Dresden
  • Ilker Hamzaoglu, Ozyegin University
  • Apurva Panchal, Qualcomm
  • Ricardo Reis, UFRGS
  • Gonzalo Carvajal, Universidad Tecnica Santa Maria
  • Luciano Radrigan, Synopsys
  • Christian Rojas, Universidad Tecnica Federico Santa Maria
  • Sezer Goren, University of Massachusetts Dartmouth

This topic deals with the design of digital VLSI systems, which demands a complex design flow from high-level design description to layout description. The flow includes synthesis, verification, optimization, and estimation tools. Optimization is necessary at all levels of design abstraction, with a wide range of possible architectures to implement the same digital system, targeting low power, high performance, and resource efficiency. System-on-Chip optimization increasingly relies on hardware accelerators.

  • Digital circuits
  • High-level and logic-level synthesis
  • Reconfigurable architectures and systems
  • SoC


Track 5: Embedded System Design
  • Villar Eugenio, University of Cantabria, Santander, Spain (Track Chair)
  • Enrico Fraccaroli, University of Verona, Italy (Track Chair)
  • Michele Lora, University of Verona
  • Samuele Germiniani, University of Verona
  • Nicola Dall'Ora, Università degli Studi Guglielmo Marconi
  • Sebastiano Gaiardelli, University of Verona
  • Pablo Sanchez, Universidad de Cantabria
  • Michael Huebner, BTU Cottbus-Senftenberg
  • Frédéric Pétrot, Université Grenoble Alpes

This topic deals with embedded systems design, focusing on the modeling, analysis, design, verification, and deployment of application-specific electronic systems that interact with their physical environment. The goal is to choose and design the proper combination of hardware and software components to meet system-level goals like speed, efficiency, reliability, security, and safety. Areas of interest include real-time systems, cyber-physical systems, parallel computing, networked systems, and dependable systems, with emphasis on model-based design, verification, and embedded software platforms.

  • Embedded software and toolchains
  • Edge computing
  • Cloud computing
  • Parallel computing and architectures


Track 6: Emerging Technologies and Applications
  • Cathal Hoare, University of Limerick, Ireland (Track Chair)
  • Freddy Gabbay, Hebrew University of Jerusalem, Israel (Track Chair)
  • Tiziana Margaria, University of Limerick
  • Arnaud Virazel, LIRMM
  • Leonid Yavits, EnICS Labs, Engineering Dept, Bar Ilan University
  • Eilam Yalon, Technion
  • Mor Dahan, Technion EE department

This topic deals with emerging technologies such as artificial intelligence, machine learning, deep learning, edge computing, quantum computing, augmented reality, virtual reality, big data, and blockchain. Applications include the Internet of Things (IoT), autonomous vehicles, agrifood, recommendation systems, robotics, personalized healthcare, smart homes, and smart cities. From the technological point of view, it also encompasses 3D integration, chiplets, non-volatile memories, silicon photonics, design using advanced transistors (sub 2nm, CFETs, 2D material based).

  • Emerging technologies


Track 7: Low-Power, Energy-Efficient and Thermal-Aware Design
  • Yuanqing Cheng, Beihang University, China (Track Chair)
  • Georgia Antoniou, University of Central Lancashire, Cyprus (Track Chair)
  • Andrea Calimera, Politecnico di Torino
  • Zhaohao Wang, Beihang University
  • Freddy Gabbay, Electrical Engineering and Applied Physics Institute
  • Qinzhi Xu, IMECAS
  • Tianyu Jia, Peking University
  • Shinobu Miwa, The University of Electro-Communications

This topic deals with algorithms, design techniques, circuits, and tools for modeling, estimating, or optimizing power consumption and thermal performance in electronic circuits and systems. It covers ultra-low-power systems (e.g., for portable/wearable devices at the edge of the IoT) to high-performance systems (like data centers) and large-scale battery systems (such as electric vehicles). Areas of interest include dynamic/adaptive management techniques for temperature/power/energy optimization, cross-layer hardware/software optimization strategies, and new circuits and architectures for low-power, energy-efficient distributed, and heterogeneous systems.

  • Cryogenic processors
  • Low-power design


Track 8: Security
  • Ibrahim Elfadel, Khalifa University, Abu Dhabi, UAE (Track Chair)
  • Paris Kitsos, University of the Peloponnese, Greece (Track Chair)
  • Johann Knechtel, New York University - Abu Dhabi
  • Elif Bilge Kavun, Barkhausen Institut & TU Dresden
  • Lilas Alrahis, Khalifa University
  • Ulrich Kühne, Télécom Paris, Institut polytechnique de Paris
  • Athanasios Papadimitriou, Department of Digital Systems, University of the Peloponnese
  • Eugenio Salazar-Brenes, Technology Innovation Institute
  • Enas Abulibdeh, Princess Sumaya University for Technology
  • Kais Belwafi, University of Sharjah

This topic deals with cybersecurity issues related to the hardware infrastructure underlying computing, storage, or communication systems, particularly when hardware can no longer be considered a root of trust. It covers hardware threats and vulnerabilities, including physical attacks, Trojan horses, IP piracy, IC counterfeiting, backdoors, tampering, and reverse engineering. It also addresses hardware Trojan detection, side-channel attacks, and countermeasures, as well as the security of emerging technologies and physically unclonable functions (PUFs).

  • Hardware security
  • IP Security
  • Secure Hardware Synthesis


Track 9: Sensing and Signal Processing Technologies
  • Graziano Pravadelli, University of Verona, Italy (Track Chair)
  • Cristian Turetta, Wenzhou Business College, China (Track Chair)
  • Vijaykrishnan Narayanan, The Pennsylvania State University
  • Chun-Jen Tsai, National Yang Ming Chiao Tung University
  • Morteza Varasteh, University of Essex

This topic deals with sensing and signal processing technologies within intelligent environments and bio-related well-being applications. It explores the development and integration of sensor technologies, innovative signal processing techniques, and energy-efficient read-out circuits for environmental and in-body sensing applications. It also examines the design and architecture of signal processing systems tailored for smart environments, ensuring scalability, reliability, and energy efficiency.

  • Sensors and biosensors
  • Signal processing
  • Circuits and architectures for signal processing


Track 10: Smart Systems, Devices and Applications
  • Saraju Mohanty, University of North Texas, Denton, USA (Track Chair)
  • Nicola Bombieri, University of Verona, Italy (Track Chair)
  • Hiren Patel, University of Waterloo
  • Alakananda Mitra, University of Nebraska Lincoln
  • Anand Kumar Bapatla, University of Central Missouri
  • Zebo Peng, Linkoping University

This topic deals with IoT systems and applications, focusing on smart systems (e.g., smart cities, smart cars) and smart applications (e.g., smart irrigation, smart wildfire detection). It also covers systems and applications based on big data, cyber-physical systems, and smart sensors for IoT applications, including hardware and software security for these systems.

  • IoT, industrial IoT, IoMT
  • Smart systems
  • Cyber-physical systems
  • Big data


Track 11: System Specification, Simulation and Verification
  • Katell Morin-Allory, Tima Laboratory, Grenoble INP-UGA, France (Track Chair)
  • Tara Ghasempouri, Tallinn Univeristy of Technology, Estonia (Track Chair)
  • Victor Kravets, IBM
  • Jose Miranda, EPFL
  • Daniel Grosse, Johannes Kepler University Linz & DFKI Bremen
  • Patrick Groeneveld, Stanford University
  • Mohammad Reza Heidari Iman, TIMA Laboratory
  • Ricardo Martins, Instituto de Telecomunicações, Instituto Superior Técnico - ULisbon

This topic deals with modeling and specification methodologies for complex HW-SW systems, including simulation-based, semi-formal, or formal validation and verification of SoCs and emerging architectures at any level. It covers testbench and assertion generation, coverage metrics, checker synthesis and optimization, and acceleration-driven and emulation-based approaches for verification and validation.

  • Simulation
  • Verification
  • System specification and modelling
  • Hardware description languages
  • Prototyping and virtual prototyping


Track 12: Test and Dependability
  • Matteo Sonza Reorda, Politecnico di Torino, Torino, Italy (Track Chair)
  • Leticia Maria Bolzani Poehls, IHP - Leibniz Institute for High Performance Microelectronics, Frankfurt Oder, Germany (Track Chair)
  • Moritz Fieback, Delft University of Technology
  • Angeliki Kritikakou, University of Rennes 1 - IRISA/INRIA
  • Daniel Tille, Siemens EDA
  • Zhiteng Chao, State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences
  • Mohammad Hasan Ahmadilivani, Tallinn University of Technology
  • Yu Huang, Mentor, A Siemens Business, Wilsonville, OR, USA
  • Cristina Meinhardt, UFSC

This topic deals with test and dependability of digital, analog/RF, mixed-signal, and embedded systems. It covers defect and fault modeling, fault simulation, test generation, design-for-test, on-line test, test infrastructure, failure analysis, fault diagnosis, fault tolerance, and functional safety and reliability.

  • Design for testability
  • Fault tolerance
  • Fault modelling
  • Testing
  • Reliability

STEERING COMMITTEE


STEERING COMMITTEE

Ibrahim Elfadel, Khalifa University, UAE
Masahiro Fujita, University of Tokyo, Japan
Manfred Glesner, TU Darmstadt, Germany
Salvador Mir, TIMA, France
Ian O'Connor, ECL, France
Graziano Pravadelli (Chair), University of Verona, Italy
Ricardo Reis, UFRGS, Brasil
Luis Miguel Silveira, INESC ID, Portugal
Fatih Ugurdag, Ozyegin University, Turkey
Chi-Ying Tsui, HKUST, Hong Kong, China